“Enhancing Power Efficiency in FIR Filter VLSI Architecture for Seismic Signal Processing with Clock Gating” (2025) International Journal of Scientific Research in Science and Technology, 12(2), pp. 866–874. Available at: https://www.ijsrst.technoscienceacademy.com/index.php/home/article/view/IJSRST251222634 (Accessed: 29 July 2025).